SignedUnsignedOpReg.h

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// SignedUnsignedOpReg.h:
// -------------------
//

#ifndef __IPSDKUTIL_INSTRUCTIONSET_ARITHMETIC_DETAIL_AVX2_SIGNEDUNSIGNEDOPREG_H__
#define __IPSDKUTIL_INSTRUCTIONSET_ARITHMETIC_DETAIL_AVX2_SIGNEDUNSIGNEDOPREG_H__

#include <IPSDKUtil/IPSDKUtilExports.h>
#include <IPSDKUtil/InstructionSet/InstructionSetTypes.h>
#include <IPSDKUtil/InstructionSet/Arithmetic/detail/SignedUnsignedOpReg.h>
#include <IPSDKUtil/InstructionSet/Arithmetic/detail/AVX2/AddReg.h>
#include <IPSDKUtil/InstructionSet/Arithmetic/detail/AVX2/SubReg.h>
#include <IPSDKUtil/InstructionSet/Arithmetic/detail/AVX2/UnaryMinusReg.h>
#include <IPSDKUtil/InstructionSet/Comparison/detail/AVX2/IsGreaterReg.h>
#include <IPSDKUtil/InstructionSet/Comparison/detail/AVX2/IsGreaterEqualReg.h>
#include <IPSDKUtil/InstructionSet/Comparison/detail/AVX2/IsLessReg.h>
#include <IPSDKUtil/InstructionSet/detail/AVX2/AssignRegDecl.h>
#include <IPSDKUtil/InstructionSet/Logical/detail/AVX2/BitwiseAndReg.h>
#include <IPSDKUtil/InstructionSet/Logical/detail/AVX2/BitwiseSelectReg.h>
#include <IPSDKUtil/InstructionSet/AVX/AvxTypes.h>
#include <IPSDKUtil/Tools/ForceInline.h>

namespace ipsdk {
namespace simd {
namespace detail {


template<typename T>
struct SignedUnsignedSubtractReg<eInstructionSet::eIS_Avx2, 
    T, /* signed */ false>
{
    typedef typename AvxType<T>::Type result_type;

    static IPSDK_FORCEINLINE
    result_type act(const typename AvxType<T>::Type& x,
                           const typename AvxType<T>::Type& y)
    {
        return SubReg<eInstructionSet::eIS_Avx2, T>::act(x, y);
    }

    static IPSDK_FORCEINLINE
    void act(const typename AvxType<T>::Type& x,
             const typename AvxType<T>::Type& y,
             result_type& out)
    {
        SubReg<eInstructionSet::eIS_Avx2, T>::act(x, y, out);
    }
};

template<typename T>
struct SignedUnsignedSubtractReg<eInstructionSet::eIS_Avx2,
                                 T, /* signed */ true>
{
    typedef typename boost::make_unsigned<T>::type unsigned_type;
    typedef typename AvxType<unsigned_type>::Type result_type;

    static IPSDK_FORCEINLINE
    result_type act(const typename AvxType<T>::Type& x,
                    const typename AvxType<T>::Type& y)
    {
        const typename AvxType<T>::Type zero =
            AssignReg<eInstructionSet::eIS_Avx2, T>::act(0);

        const typename AvxType<T>::Type yNeg =
            IsLessReg<eInstructionSet::eIS_Avx2, T>::act(y, zero);

        const typename AvxType<T>::Type xNeg =
            IsLessReg<eInstructionSet::eIS_Avx2, T>::act(x, zero);

        const typename AvxType<T>::Type yNegAndXNotNeg =
            BitwiseAndNotReg<eInstructionSet::eIS_Avx2, T>::act(yNeg, xNeg);

        const typename AvxType<T>::Type one =
            AssignReg<eInstructionSet::eIS_Avx2, T>::act(1);

        return BitwiseSelectReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(
            yNegAndXNotNeg,

            // avoid the nasty two's complement case for y == min()
            // return result_type(x) + result_type(-(y+1)) + 1;
            AddReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(
                AddReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(
                    x, 
                    UnaryMinusReg<eInstructionSet::eIS_Avx2, T>::act(
                        AddReg<eInstructionSet::eIS_Avx2, T>::act(y, one))),
                one),
                     
            // return result_type(x - y);
            SubReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(x, y));
        //return SubReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(x, y);
    }

    static IPSDK_FORCEINLINE
    void act(const typename AvxType<T>::Type& x,
             const typename AvxType<T>::Type& y,
             result_type& out)
    {
        const typename AvxType<T>::Type zero =
            AssignReg<eInstructionSet::eIS_Avx2, T>::act(0);

        const typename AvxType<T>::Type one =
            AssignReg<eInstructionSet::eIS_Avx2, T>::act(1);

        typename AvxType<T>::Type yNeg;
        IsLessReg<eInstructionSet::eIS_Avx2, T>::act(y, zero, yNeg);

        typename AvxType<T>::Type xNeg;
        IsLessReg<eInstructionSet::eIS_Avx2, T>::act(x, zero, xNeg);

        typename AvxType<T>::Type yNegAndXNotNeg;
        BitwiseAndNotReg<eInstructionSet::eIS_Avx2, T>::act(yNeg, xNeg, yNegAndXNotNeg);

        typename AvxType<T>::Type a_t;
        typename AvxType<unsigned_type>::Type a, b;
        
        AddReg<eInstructionSet::eIS_Avx2, T>::act(y, one, a_t);
        UnaryMinusReg<eInstructionSet::eIS_Avx2, T>::act(a_t, a_t);
        cast<eInstructionSet::eIS_Avx2, T, unsigned_type>(a_t, a);
        AddReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(x, a, a);
        AddReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(a, one, a);

        SubReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(x, y, b);
        
        BitwiseSelectReg<eInstructionSet::eIS_Avx2, unsigned_type>::act(
            yNegAndXNotNeg, a, b, out);
    }
};

template<typename T1, typename T2>
struct SignedUnsignedAddReg<eInstructionSet::eIS_Avx2, 
    T1, T2, /* signed */ false>
{
    typedef typename AvxType<T2>::Type result_type;

    static IPSDK_FORCEINLINE
    result_type act(const typename AvxType<T1>::Type& x,
                           const typename AvxType<T2>::Type& y)
    {
        return AddReg<eInstructionSet::eIS_Avx2, T2>::act(x, y);
    }

    static IPSDK_FORCEINLINE
    void act(const typename AvxType<T1>::Type& x,
             const typename AvxType<T2>::Type& y,
             result_type& out)
    {
        AddReg<eInstructionSet::eIS_Avx2, T2>::act(x, y, out);
    }
};

template<typename T1, typename T2>
struct SignedUnsignedAddReg<eInstructionSet::eIS_Avx2,
    T1, T2, /* signed */ true>
{
    typedef typename AvxType<T2>::Type result_type;

    static IPSDK_FORCEINLINE
    result_type act(const typename AvxType<T1>::Type& x,
                           const typename AvxType<T2>::Type& y)
    {
        const typename AvxType<T1>::Type zero =
            AssignReg<eInstructionSet::eIS_Avx2, T1>::act(0);

        const typename AvxType<T2>::Type one =
            AssignReg<eInstructionSet::eIS_Avx2, T2>::act(1);

        const typename AvxType<T1>::Type yNeg =
            IsLessReg<eInstructionSet::eIS_Avx2, T1>::act(y, zero);

        const typename AvxType<T1>::Type minusYPlusOne =
            UnaryMinusReg<eInstructionSet::eIS_Avx2, T2>::act(
                AddReg<eInstructionSet::eIS_Avx2, T2>::act(y, one));

        const typename AvxType<T1>::Type xGtThnMinusYPlusOne =
            IsGreaterReg<eInstructionSet::eIS_Avx2, T1>::act(x, minusYPlusOne);

        const typename AvxType<T1>::Type yNegAndXGtThnMinusYPlusOne =
            BitwiseAndReg<eInstructionSet::eIS_Avx2, T1>::act(
                yNeg, xGtThnMinusYPlusOne);


        return BitwiseSelectReg<eInstructionSet::eIS_Avx2, T2>::act(
            yNegAndXGtThnMinusYPlusOne,

            // avoid the nasty two's complement edge case for y == min()
            // return T2(x - T1(-(y+1)) - 1);
            SubReg<eInstructionSet::eIS_Avx2, T1>::act(
                SubReg<eInstructionSet::eIS_Avx2, T1>::act(
                    x, minusYPlusOne),
                one),
            // return T2(x) + y;
            AddReg<eInstructionSet::eIS_Avx2, T2>::act(x, y));
        //return AddReg<eInstructionSet::eIS_Avx2, T2>::act(x, y);
    }

    static IPSDK_FORCEINLINE
    void act(const typename AvxType<T1>::Type& x,
             const typename AvxType<T2>::Type& y,
             result_type& out)
    {
        const typename AvxType<T1>::Type zero =
            AssignReg<eInstructionSet::eIS_Avx2, T1>::act(0);

        const typename AvxType<T2>::Type one =
            AssignReg<eInstructionSet::eIS_Avx2, T2>::act(1);

        typename AvxType<T1>::Type yNeg;
        IsLessReg<eInstructionSet::eIS_Avx2, T1>::act(y, zero, yNeg);

        typename AvxType<T2>::Type minusYPlusOne_t2;
        AddReg<eInstructionSet::eIS_Avx2, T2>::act(y, one, minusYPlusOne_t2);
        UnaryMinusReg<eInstructionSet::eIS_Avx2, T2>::act(minusYPlusOne_t2, minusYPlusOne_t2);

        typename AvxType<T1>::Type minusYPlusOne;
        cast<eInstructionSet::eIS_Avx2, T2, T1>(minusYPlusOne_t2, minusYPlusOne);

        typename AvxType<T1>::Type xGtThnMinusYPlusOne;
        IsGreaterReg<eInstructionSet::eIS_Avx2, T1>::act(x, minusYPlusOne, xGtThnMinusYPlusOne);

        typename AvxType<T1>::Type yNegAndXGtThnMinusYPlusOne;
            BitwiseAndReg<eInstructionSet::eIS_Avx2, T1>::act(
                yNeg, xGtThnMinusYPlusOne, yNegAndXGtThnMinusYPlusOne);

        typename AvxType<T1>::Type a;
        SubReg<eInstructionSet::eIS_Avx2, T1>::act(x, minusYPlusOne, a);
        SubReg<eInstructionSet::eIS_Avx2, T1>::act(a, one, a);

        typename AvxType<T2>::Type b;
        AddReg<eInstructionSet::eIS_Avx2, T2>::act(x, y, b);
        BitwiseSelectReg<eInstructionSet::eIS_Avx2, T2>::act(
            yNegAndXGtThnMinusYPlusOne, a, b, out);
    }
};


} // end of namespace detail
} // end of namespace simd
} // end of namespace ipsdk

#endif // __IPSDKUTIL_INSTRUCTIONSET_ARITHMETIC_DETAIL_AVX2_ADDREG_H__